Merge commit 'b57a95d0147beae746db1c1223d100447f42dced'
[ffmpeg.git] / libswscale / aarch64 / output.S
1 /*
2  * Copyright (c) 2016 Clément Bœsch <clement stupeflix.com>
3  *
4  * This file is part of FFmpeg.
5  *
6  * FFmpeg is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lesser General Public
8  * License as published by the Free Software Foundation; either
9  * version 2.1 of the License, or (at your option) any later version.
10  *
11  * FFmpeg is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * Lesser General Public License for more details.
15  *
16  * You should have received a copy of the GNU Lesser General Public
17  * License along with FFmpeg; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
19  */
20
21 #include "libavutil/aarch64/asm.S"
22
23 function ff_yuv2planeX_8_neon, export=1
24         ld1                 {v0.8B}, [x5]                   // load 8x8-bit dither
25         cbz                 w6, 1f                          // check if offsetting present
26         ext                 v0.8B, v0.8B, v0.8B, #3         // honor offsetting which can be 0 or 3 only
27 1:      uxtl                v0.8H, v0.8B                    // extend dither to 16-bit
28         ushll               v1.4S, v0.4H, #12               // extend dither to 32-bit with left shift by 12 (part 1)
29         ushll2              v2.4S, v0.8H, #12               // extend dither to 32-bit with left shift by 12 (part 2)
30         mov                 x7, #0                          // i = 0
31 2:      mov                 v3.16B, v1.16B                  // initialize accumulator part 1 with dithering value
32         mov                 v4.16B, v2.16B                  // initialize accumulator part 2 with dithering value
33         mov                 w8, w1                          // tmpfilterSize = filterSize
34         mov                 x9, x2                          // srcp    = src
35         mov                 x10, x0                         // filterp = filter
36 3:      ldp                 x11, x12, [x9], #16             // get 2 pointers: src[j] and src[j+1]
37         add                 x11, x11, x7, lsl #1            // &src[j  ][i]
38         add                 x12, x12, x7, lsl #1            // &src[j+1][i]
39         ld1                 {v5.8H}, [x11]                  // read 8x16-bit @ src[j  ][i + {0..7}]: A,B,C,D,E,F,G,H
40         ld1                 {v6.8H}, [x12]                  // read 8x16-bit @ src[j+1][i + {0..7}]: I,J,K,L,M,N,O,P
41         ldr                 w11, [x10], #4                  // read 2x16-bit coeffs (X, Y) at (filter[j], filter[j+1])
42         zip1                v16.8H, v5.8H, v6.8H            // A,I,B,J,C,K,D,L
43         zip2                v17.8H, v5.8H, v6.8H            // E,M,F,N,F,O,H,P
44         dup                 v7.4S, w11                      // X,Y,X,Y,X,Y,X,Y
45         smull               v18.4S, v16.4H, v7.4H           // A.X I.Y B.X J.Y
46         smull               v20.4S, v17.4H, v7.4H           // E.X M.Y F.X N.Y
47         smull2              v19.4S, v16.8H, v7.8H           // C.X K.Y D.X L.Y
48         smull2              v21.4S, v17.8H, v7.8H           // G.X O.Y H.X P.Y
49         addp                v16.4S, v18.4S, v19.4S          // A.X+I.Y B.X+J.Y C.X+K.Y D.X+L.Y
50         addp                v17.4S, v20.4S, v21.4S          // E.X+M.Y F.X+N.Y F.X+O.Y H.X+P.Y
51         add                 v3.4S, v3.4S, v16.4S            // update val accumulator for part 1
52         add                 v4.4S, v4.4S, v17.4S            // update val accumulator for part 2
53         subs                w8, w8, #2                      // tmpfilterSize -= 2
54         b.gt                3b                              // loop until filterSize consumed
55         sshr                v3.4S, v3.4S, #19               // val>>19 (part 1)
56         sshr                v4.4S, v4.4S, #19               // val>>19 (part 2)
57         sqxtun              v3.4H, v3.4S                    // clip16(val>>19) (part 1)
58         sqxtun              v4.4H, v4.4S                    // clip16(val>>19) (part 2)
59         mov                 v3.D[1], v4.D[0]                // merge part 1 and part 2
60         uqxtn               v3.8B, v3.8H                    // clip8(val>>19)
61         st1                 {v3.1D}, [x3], #8               // write to destination
62         add                 x7, x7, #8                      // i += 8
63         subs                w4, w4, #8                      // dstW -= 8
64         b.gt                2b                              // loop until width consumed
65         ret
66 endfunc