* commit '0c0b87f12d48d4e7f0d3d13f9345e828a3a5ea32':
aarch64: vp9itxfm: Fix incorrect vertical alignment
aarch64: vp9itxfm: Update a comment to refer to a register with a different name
aarch64: vp9itxfm: Use the right lane sizes in 8x8 for improved readability
aarch64: vp9itxfm: Use a single lane ld1 instead of ld1r where possible
aarch64: vp9itxfm: Share instructions for loading idct coeffs in the 8x8 function
arm: vp9itxfm: Share instructions for loading idct coeffs in the 8x8 function
aarch64: vp9itxfm: Do separate functions for half/quarter idct16 and idct32
arm: vp9itxfm: Do a simpler half/quarter idct16/idct32 when possible
aarch64: vp9itxfm: Move the load_add_store macro out from the itxfm16 pass2 function
arm: vp9itxfm: Move the load_add_store macro out from the itxfm16 pass2 function
aarch64: vp9itxfm: Make the larger core transforms standalone functions
arm: vp9itxfm: Make the larger core transforms standalone functions